1. Field of Invention
This invention relates to a bumping process. More particularly, the present invention is related to a method for patterning the first electrically conductive layer of the UBM layer (Under Bump Metallurgy layer) and then patterning the second electrically conductive layer on said patterned first electrically conductive layer.
2. Related Art
In this information explosion age, integrated circuit products are used almost everywhere in our daily life. As fabricating technique continue to improve, electronic products having powerful functions, personalized performance and a higher degree of complexity are produced. Nowadays, most electronic products are relatively light and have a compact body. Hence, in semiconductor production, various types of high-density semiconductor packages have been developed. Flip chip is one of the most commonly used techniques for forming an integrated circuit package. Moreover, compared with a wire-bonding package or a tape automated bonding (TAB) package, a flip-chip package uses a shorter electrical path on average and has a better overall electrical performance. In a flip-chip package, the bonding pads on a die and the contacts on a substrate are connected together through a plurality of bumps formed by the method of bumping process. Accordingly, the technology of bumping process becomes more and more important in the advanced packaging fields.
Referring to FIG. 1, it shows a flow chart illustrating the process flow of a conventional bumping process. The conventional bumping process mainly comprises the following steps. Firstly, a wafer having a plurality of bonding pads and a passivation layer is provided as shown in the step of S101. Therein, the passivation layer exposes the bonding pads. Next, a first dielectric layer is formed over the wafer and exposes the bonding pads through a plurality of first openings and the passivation layer through a plurality of second openings as shown in the step of S102.
Afterwards, a redistributed layer is formed over the first dielectric layer, the bonding pads and the passivation layer as shown in the step of S103. Generally speaking, the redistributed layer comprises a patterned first electrically conductive layer and a patterned second electrically conductive layer. Therein, the patterned first electrically conductive layer and the patterned second electrically conductive layer are formed by the steps of forming the first electrically conductive layer and the second electrically conductive layer above the passivation layer, forming a photo-resist layer above the second electrically conductive layer, patterning the photo-resist layer through photolithography and etching processes and then removing portions of the first electrically conductive layer and the second electrically conductive layer as shown in the step of S104.
Moreover, a second dielectric layer is formed on the patterned second electrically conductive layer and exposes portions of the patterned first electrically conductive layer and the patterned second electrically conductive layer through the second openings so that the exposed portions of the patterned second electrically conductive layer are regarded as bump pads as shown in the step of S105. Therein, the bump pads are electrically connected to the bonding pads through the redistributed layer (the patterned first electrically conductive layer and the patterned second electrically conductive layer).
Finally, there are bumps formed on the bump pads and the bumps are then reflowed to be fixed on the bump pads more securely and shaped into a ball-like shape (step of S106).
In the aforementioned conventional bumping process, the redistributed layer applicable to bumping process for the copper wafer mainly comprises a titanium layer and a titanium-tungsten layer, or a chromium layer and a copper layer. Therein, a hydrogen-fluorine solution (HF) and a aquaforits solution (HNO3) are usually taken as etchants to patterning the copper layer; a sulfuric acid solution (H2SO4) and a dilute phosphoric solution comprising deionized water (DI water), phosphoric acid (CH3COOH), acetic acid (H3PO4) and hydrogen peroxide (H2O2), wherein the composition of said etchant can be refereed to U.S. Pat. No. 5,508,229, is taken as an etchant to define the nickel-vanadium layer. The hydrogen-fluorine solution or the mixed solution comprising ammonium hydroxide and hydrogen-fluorine (HF) as shown in U.S. Pat. Nos. 6,013,572 and 5,162,257 are usually taken as the etchants to define the titanium layer. Moreover, the mixed solution comprising hydrogen peroxide (H2O2), EDTA and potassium sulfate (K2SO4) as shown in U.S. Pat. No. 5,462,638 is taken as an etchant to pattern the adhesive layer made of titanium-tungsten. In addition, the mixed solution comprising hydrochloric is taken as an etchant to pattern the adhesive layer made of chromium as shown in U.S. Pat. No. 5,162,257.
Besides, the under bump metallurgy layer applicable to bumping process for the aluminum wafer mainly comprises an aluminum layer, a nickel-vanadium layer and a copper layer. The etchant for patterning the aluminum layer comprises phosphoric acid, acetic acid and deionized water (DI). Therein, 83% of the etchant is phosphoric acid; 11% of the etchant is acetic acid; and 6% of the etchant is deionized water wherein the composition of the etchant can be referred to U.S. Pat. No. 5,508,229. However, not only the process shown in FIG. 1A but also the process specified in FIG. 1B, the step of patterning the first electrically layer is performed after the second electrically conductive layer are defined or patterned.
However, the steps of the mentioned-above bumping process usually at least cause the side of one portion of the patterned first electrically conductive layer disposed above the bonding pad to be undercut. Namely, there is at least one undercut formed at the side of one portion of the patterned first electrically conductive layer so as to make the cross-sectional area of the patterned first electrically conductive layer smaller and smaller. In such a manner, the mechanical strength of the redistributed layer will be reduced and the external force will cause the redistributed layer damaged more easily at the patterned first electrically conductive layer.
Therefore, providing another method for forming bumps to solve the mentioned-above disadvantages is the most important task in this invention.